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AMD Unveils New AI Hardware, Software & Infrastructure at Advancing AI Developer Conference

AMD Unveils New AI Hardware, Software & Infrastructure at Advancing AI Developer Conference

AMD has detailed its roadmap for Ai development at its Advancing Ai 2025 event in San Jose, introducing a new wave of silicon, infrastructure and open software designed to support a broad, industry-wide push toward more accessible and efficient Ai systems.

The company showcased what it described as a complete, end-to-end Ai platform, anchored by the launch of its latest Instinct MI350 Series accelerators and ROCm 7 software stack.

Speaking at the event, AMD Chair and Chief Executive Dr Lisa Su said, “We are entering the next phase of Ai, driven by open standards, shared innovation and AMD’s expanding leadership across a broad ecosystem of hardware and software partners who are collaborating to define the future of Ai.”

Hardware Highlights Include MI350 And Preview Of Helios

The new MI350 Series includes the Instinct MI350X and MI355X accelerators, which AMD claims deliver up to four times more compute and 35 times more inferencing performance than the previous generation. It also cited a 40 per cent improvement in tokens-per-dollar when compared to competing alternatives.

AMD also previewed its upcoming “Helios” rack-scale Ai infrastructure. Due for release after 2025, Helios will be powered by MI400 GPUs and “Zen 6”-based EPYC “Venice” CPUs, as well as AMD Pensando Vulcano networking cards. AMD says the platform is designed for inference tasks involving Mixture of Experts models and will support large-scale Ai development.

The ROCm 7 software stack is set to play a central role in AMD’s Ai ambitions. It features expanded support for frameworks, development tools, and compatibility across hardware. According to AMD Corporate Vice President Anush Elangovan, ROCm 7 is aimed at improving performance while making it easier for developers to build and deploy Ai applications.

Energy Efficiency And Developer Access

Energy efficiency was a key focus of AMD’s announcements. The company claimed the MI350 Series surpassed its previous five-year target of a 30x energy efficiency gain, instead reaching 38x. AMD also committed to a new 2030 goal, aiming for a 20x improvement in rack-scale energy efficiency compared to 2024. According to AMD’s Sam Naffziger, these gains would allow a model currently requiring over 275 racks to be trained using fewer than one by the end of the decade.

AMD also launched the AMD Developer Cloud, offering developers access to a managed Ai environment built for scalability. Partnerships with platforms including Hugging Face, OpenAI and Grok were cited as examples of collaborative efforts around open-source Ai development.

Key Partners Outline Joint Efforts

Several partners joined AMD at the event to share how they are integrating Instinct accelerators into their operations.

Meta said it is deploying MI300X hardware for Llama 3 and Llama 4 inference, and is planning to adopt the MI350 Series for future Ai infrastructure. The company also indicated ongoing collaboration with AMD on the next-generation MI400 platform.

OpenAI Chief Executive Sam Altman highlighted the need for jointly optimised hardware and software. He confirmed OpenAI is using MI300X for its models on Azure and is working closely with AMD on MI400 platform development.

Oracle Cloud Infrastructure (OCI) is among the first to use AMD’s rack-scale infrastructure, deploying up to 131,072 MI355X GPUs in Ai clusters. OCI is positioning the infrastructure to support large-scale model training and inference for customers.

Microsoft confirmed that Instinct MI300X is being used for both proprietary and open-source models in production on Azure. Other announcements came from Cohere, which is deploying its Command models on AMD hardware, and Red Hat, which is integrating AMD GPUs into Red Hat OpenShift Ai environments.

Astera Labs and Marvell also participated in the event, discussing their involvement in the UALink Consortium, which is working to create open interconnect standards for Ai infrastructure.

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